This invention relates to an exposure apparatus which is capable of realizing a line width of submicron order and high precision alignment of a reticle and a wafer.
The rate of integration in semiconductor devices has increased more and more recently, and therefore, dimensions of semiconductor devices are approaching submicron order. In forming minute patterns of such submicron order, conventional exposure by use of ultra violet rays can not form such minute patterns. As exposure apparatus which may realize the formation of such minute patterns, exposure apparatus which use deep ultra violet rays, X rays, an electron beam, an ion beam, etc. have been studied and highlighted. However, such exposure apparatus are expensive and, in exposure apparatus which use X rays, an electron beam, or an ion beam, beam strength is weak and exposure takes a long time so that it is difficult to apply such exposure apparatus to mass-production of semiconductor devices.
In an exposure apparatus which is applied to mass-production of semiconductor devices, a reduction projection alignment and exposure apparatus, i.e., a reduction projection aligner, is used. The exposure apparatus of this type comprises a light source, a condenser lens, a reticle and a reduction micro-lens. Light beams from a light source are applied to the reduction microlens through the condenser lens and the reticle. An image of the reticle pattern is focused on wafer by the reduction microlens. In the case of the above-stated reduction projection exposure, a numerical aperture N.A. can be set to a large number, and, supposing that the N.A. is 0.32, the reduction rate m is 10 and the wavelength .lambda. of the light beam is 435.6 mm, with the highest resolution (minimum feature size) being approximately 0.9 .mu.m in line width.
In realizing semiconductor devices with a submicron order line width, alignment of a photo-mask and a wafer is important. In the past, several alignment methods have been used or proposed. One such method is the mark alignment method wherein an alignment mark is disposed on the photo-mask and in the wafer, respectively. The alignment is carried out by aligning the above-stated two alignment marks. This method results in low alignment precision 0.2 .mu.m/3.sigma., and therefore, can not be applied to production of submicron devices.
Another method is the superimposed dual grating interferometric alignment method which was proposed by S. Austin (see, Applied Physics Letters, Vol. 31, No. 7, p. 428, 1977). This method uses interference of light rays and can realize a higher precision alignment of the photo-mask and the wafer, but the constructed interferometers were not ideal so that the alignment was affected by the gap between the mask and the wafer. As a result, it is difficult to make a commercially usable apparatus.
Still another method is the alignment method by observing secondary electron emission emitted from semiconductor devices. However, this method can not be used in air so that output in manufacturing LSIs is small.
Incidentally, the basic structure of the present invention is disclosed in copending, commonly assigned patent application Ser. No. 761,024 filed on July 31, 1985.